Korishan said:Are you using a bms?
How many cycles does it take to drift that much/little?
Generally speaking, drift can happen for lots of reasons. A cell that's very slow discharging, a connection is loose, missing/broken fuse wire to a cell(s), buss wire isn't large enough to handle the current, balance leads from bms not hooked up securely, etc
barry said:you said "mutch/little" is the drif oke? will it be a problem?
Korishan said:barry said:you said "mutch/little" is the drif oke? will it be a problem?
Some view <0.005V drift acceptable, others <0.01V acceptable.
It also depends on how many cells are in parallel. The more that are connected, the more drift that could occur. If it keeps happening, then you have an issue somewhere in your packs.
Another thing that could cause it to "seem" like there is drift, is if you did a test voltage while the charger/discharge was happening, or checking too soon after charge/discharge was disconnected. Don't do a measurement within seconds of disconnect. Wait about a minute to let the cells settle. Under charge/discharge, you could actually have slight voltage different from one end of the pack to the other (this is measured with one probe static position).
It's good that you are watching the voltages that closely, though. 3 digit readings can be pretty helpful in diagnosing issues.
gauss163 said:We need more info. How long (time not cycles) did it take for that balance drift? What type of balancer do you use? Did you do any type of matching when constructing the packs, e.g. by capacity, IR, or self-discharge?
not2bme said:[...] Deviation between the packs may change during the day, and that's OK. You will never create an exactly balanced pack. So at certain battery state or SoC during the day, especially when reaching full charge or low charge, one battery may reach that goal faster so if you look at the charge curve the voltage will shoot up creating this deviation from the rest of the pack [...]
gauss163 said:Please post a photo of the positive terminal of the cell with the ruptured sidewall. Are itsvents clogged by debris? Did any debris appear to erupt from the vents? Did you mess with the CID on any cell, e.g. attempt to resent it?
barry said:the strange thing is the voltage was 4.15 volt but its slowly goes down in voltage now
Thanks for your explanation and yes i caught it in time pfff... i do not know how it happend, the cell was not dented or damaged in some way what i could see when i installed it.
the strange thing is the voltage was 4.15 volt but its slowly goes down in voltage now
gauss163 said:not2bme said:[...] Deviation between the packs may change during the day, and that's OK. You will never create an exactly balanced pack. So at certain battery state or SoC during the day, especially when reaching full charge or low charge, one battery may reach that goal faster so if you look at the charge curve the voltage will shoot up creating this deviation from the rest of the pack [...]
The hourly variations of 0.01V or so shown in your graph likely do not correspond to SOC differences. Rather, they are more likely due to thermal drift in the voltage meters, and possibly also variations in IR, which will serve to perturbthe readingswhen measured under (dis)charge.
not2bme said:The chart is daily so each peak is when the packs are heading towards full charge during the day. I'm sure there's some variations in IR that would affect the voltage, but it's still due to the SoC.
gauss163 said:SOC imbalances generally don't evolve under short (hour/day) timescales (unless you have a high-rateself-discharging cell, or huge temp imbalances). Li-ion cells havenearly 100% coulombic efficiency, i.e.charge_in = charge_out. So if they start out well-balanced they will remain that way over short periods since there are no charge losses.
But over much longer periods they can become (significantly) imbalanced due to differing self-discharge rates, and also due to various degradation processes.
The minor hourly variations you are seeing are almost surelydue to the reasons I mentioned in my prior post(a poorbalancing circuit may also play a role).